Semiconductor memory devices are rapidly-accessible memory devices. In a semiconductor memory device, the time required for storing and retrieving information generally is independent of the physical location of the information within the memory device. Semiconductor memory devices typically store information in a large array of cells. A group of cells are electrically connected together by a bit line, or data line. An electrical signal is used to program a cell or cells.
Computer, communication and industrial applications are driving the demand for memory devices in a variety of electronic systems. One important form of semiconductor memory device includes a non-volatile memory made up of floating-gate memory cells called flash memory. Computer applications use flash memory to store BIOS firmware. Peripheral devices such as printers store fonts and forms on flash memory. Digital cellular and wireless applications consume large quantities of flash memory and are continually pushing for lower voltages and power demands. Portable applications such as digital cameras, audio recorders, personal digital assistants (PDAs) and test equipment also use flash memory as a medium to store data.
To achieve lower operating voltages and lower power demands, operation of the memory device must generally come under tighter constraints. Lower operating margins increase the demands on sensing circuits and related circuits for accessing a memory cell and sensing the data contained therein. For example, sensing devices in flash memory devices often rely on a voltage differential to determine the programmed state of a memory cell, such as a voltage differential between a target bit line and a reference voltage. As operating voltages are reduced, such differential sensing devices often must be capable of distinguishing between smaller voltage differentials. At lower voltages, differential sensing becomes slower and, at very low voltages, may even become unreliable.
Read Only Memory (ROM) devices often utilize a single-ended sensing scheme as opposed to differential sensing. A single-ended sensing device has a single input coupled to a target bit line and provides an output signal indicative of a potential level of the target bit line. In operation, the target bit line is precharged to some precharge potential. During or after precharging, the word line of the target memory cell is driven. Upon release from the precharge potential, the logic state of the target memory cell is sensed. If the potential level of the target bit line remains unchanged, it is indicative of no current flow through the target memory cell, thus corresponding to a first logic state. If the potential level of the target bit line falls, it is indicative of current flow through the target memory cell, thus corresponding to a second logic state.
The single-ended sensing device often contains an inverter providing the output signal indicative of the logic state and having a threshold point close to the precharge potential. Choosing a threshold point close to the precharge potential improves the speed of the sensing device by reducing the time necessary to detect the second logic state. Choosing a threshold point close to the precharge potential also improves the power usage of the sensing device by reducing the amount of current necessary to precharge the bit line for the next read cycle. However, choosing a threshold point close to the precharge potential risks erroneous indications of the second logic state if undesired, or residual, current flow is experienced. Such risks have hindered use of single-ended sensing in high-performance flash memory devices, which often experience some residual current due to depletion, leakage, insufficient programming or other phenomena, yet must often perform at lower operating voltages and lower power requirements.
The dominant component of a sensing operation is typically either the time needed to raise a target word line to a read potential or the time needed to raise a target bit line to the precharge potential. As these components of the sensing operation are generally concurrent, the slowest component will generally determine the access time of a memory device. The slowest component of the sensing operation is often the precharge phase. Thus, improvements in the precharge phase can facilitate significant improvements in access time.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative sensing devices for integrated-circuit memory devices, memory devices containing such sensing devices, and methods of their operation.